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enhanced type ii caller id decoder nw6005 the idt logo is a registered trademark of integrated device technology, inc industrial temperature range july 2002 ? 2002 integrated device technology, inc. dsc-6048/3 fea tures 1200 baud bell 202 and itu-t v.23 frequency shift keying (fsk) demodulation compliant with following specifications: bellcore gr-30-core & sr-tsv-002476 tia/eia-716, tia/eia-777 draft british telecom (bt) sin227 & sin242 etsi ets 300 778-1 and -2 bellcore ?cpe alerting signal (cas)?, british telecom ?idle state and loop state tone alert signal? and etsi ?dual tone alerting signal (dt-as)? detection two seperate op amps with adjustable gain for tip/ring and telephone hybrid connections monitoring of the stop bit for framing error check serial fsk data interface with selectable output of bit stream or 1 byte buffer fsk carrier detection 3 v or 5 v operation low power cmos with intelligent powerdown mode operating temperature range: -40 c to +85 c packages available: nw6005-xs 20 pin soic (where ?x? is the revision id) figure 1. block diagram vref in1+ in1- gs1 oscout oscin cb0 cb1 cb2 st/gt dr / std description the nw6005 device is a single-chip, 3/5 volt cmos caller id with call waiting detection circuit. it can receive signals following bellcore gr-30-core & sr-tsv-002476, bt sin227 & sin242, and etsi ets 300 788-1/-2 specifications. the nw6005 provides 1200 baud bell 202 and itu-t v.23 fsk demodulation and cas/dt-as detection. two seperate differential input amplifiers allow the device to be connected with both tip/ring and telephone hybrid receive pair. fsk demodulation is implemented only on tip/ring, while dt-as (or cas) detection can be on either tip/ring or hybrid receive. in addition, nw6005 provides a serial fsk data interface via which the data can be selected to be processed as a bit stream or extracted from a 1 byte built-in buffer. the device can be used in feature or cordless phones for bt calling line identity presentation (clip), cca clip and bellcore calling identity delivery (cid) systems. it can also be used in caller id boxes, modem, fax machines, answering machines, database query systems and computer telephony integration (cti) systems. oscillator control bit decoder bias generator guard time dual tone detector fsk demodulator data/timing recovery + - + - mux pwdn pwdn casen casen fsken mode gs1en gs2en fsken mode gs1en gs2en in2+ in2- gs2 est cd dclk data functional block diagram
2 industrial temperature range nw6005 enhanced type ii caller id decoder pin informa tion figure 2. pin assignment vref in1+ in1- gs1 gnd oscin oscout cb0 dclk da t a in2+ in2- gs2 cb2 cb1 vcc cd st/gt est dr / std 20 19 18 17 16 15 14 13 12 1 1 1 2 3 4 5 6 7 8 9 10 name type pin no. description vref o 1 reference voltage. this output is used to bias the input op amp. it is typically vcc/2. in1+ i 2 non - inverting input of the gain adjustable tip/ring op amp . in1 - i 3 inverting input of the gain adjustable tip/ring op amp . gs1 o 4 gain select output of the gain adjustable tip/ring op amp . the tip/ring signal can be attenuated or amplified at gs1 by adjusting the feedback resistor between gs1 and in1 - . the fsk signal is always detected by tip/ring op amp while dt - a s signal can be detected by either tip/ring or hybrid op amp. the op amp selection is controlled by cb1 and cb2 pins. gnd - 5 ground. oscin i 6 oscillator input. a 3.579545 mhz crystal or ceramic resonator should be connected between this pin and the osc out. it can also be driven by an external clock source. oscout o 7 oscillator output. a 3.579545 mhz crystal or ceramic resonator should be connected between this pin and the oscin. when an external clock drives oscin, this pin can be left floating. cb0 i 8 control bit 0 (fsk data interface mode select) . this pin can select the 3 - wire fsk data interface mode. a ?0? on this pin indicates interface mode 0; while a ?1? on this pin indicates interface mode 1. (the fsk data interface is consisted of data, dclk and dr / std pins.) when cb0 is high and cb1, cb2 are both low, the device is set into the power down state. dclk i/nc 9 data clock of the serial fsk interface. in mode 0 (cb0 is low), this pin is unused; in mode 1 (cb0 is high), this pin is an input which clock the fsk data byte out to the data pin. data o 10 data output of the serial fsk interface. in mode 0 (cb0 is low), the fsk serial bit stream is output to the data pin directly. in mode 1 (cb0 is high), the start bit is stripped off, the data by te and the stop bit is stored in a 9 - bit buffer. at the end of each word signaled by the dr / std pin, the microcontroller should shift the byte out onto the data pin by applying 8 read pulses to the dclk pin. a 9 th dclk pulse will shift out the stop bit for framing error checking.
3 industrial temperature range nw6005 enhanced type ii caller id decoder abbreviation index cas ----------------------------------------------------------- cpe alerting signal cds ---------------------------------------------------------- caller display service cid ---------------------------------------------------------- calling identity delivery cidcw ---------------------------------------------------------- calling identity delivery on call waiting clip ---------------------------------------------------------- calling line identity presentation cnam --------------------------------------------------------- calling name delivery cnd --------------------------------------------------------- calling number delivery cnic ---------------------------------------------------------- calling number identification circuit co ---------------------------------------------------------- central office dt-as ---------------------------------------------------------- dual tone alert signal mei ---------------------------------------------------------- multiple extension interworking te ---------------------------------------------------------- terminal equipment pin informa tion (continued) name type pin no. description dr / std o/nc 11 data ready or dt - as detection delayed steering output. this pin is active low. when fsk demodulation is enabled, this pin is the data ready output. in fsk interface mode 0, this pin is unused and reads ?1?. whi le mode 1, this pin is normally high and goes low for half a bit time at the end of a word. if dclk starts during dr low, the first rising edge of the dclk input will return dr to high. in this way, reading of the first data bit can clear the interrupt req uested by a low going dr . when dt - as detection is enabled, this pin is the delayed steering output. an active low signal on this output indicates the detection of a ?guard time qualified? dt - as. est o 12 dt - as early steering output. this pin is an active high output to indicate the detection of a raw dt - as signal. it is used with the st/gt pin and external components to time qualify the detection. st/gt i/o 13 dt - as detection steering input/guard time output. it?s a cmos output and an input of voltage com parator. it is used in conjunction with the est pin and external components to time qualify a raw dt - as signal detection. if the voltage at this pin is greater than the voltage threshold, dr / std pin is asserted low to indicate that a dt - as has been detecte d. a voltage less than the threshold enable the device to accept a new dt - as and return the dr / std pin to high. cd o 14 fsk carrier detector. this is an active low cmos output signal to indicate the presence of in - band fsk signal. vcc - 15 3/5 v power su pply. cb1 i 16 control bit 1 (function select 1) . this pin is used with cb0 and cb2 to select fsk demodulation, tip/ring dt - as detection or hybrid dt - as detection. see table 1. when cb0 is high, cb1 and cb2 pins are both low, the device is set into the po wer down state. cb2 i 17 control bit 2 (function select 0) . this pin is used with cb0 and cb1 to select fsk demodulation, tip/ring dt - as detection or hybrid dt - as detection. see table 1. when cb0 is high, cb1 and cb2 pins are both low, the device is set into the power down state. gs2 o 18 gain select output of the gain adjustable hybrid op amp. the hybrid receive signal can be amplified or attenuated at gs2 by adjusting the feedback resistor between gs2 and in2 - . when the cpe is off - hook, dt - as detection of the gs2 signal should be enabled via the cb1 and cb2 pins. in2 - i 19 inverting input of the gain adjustable hybrid op amp. in2+ i 20 non - inverting input of the gain adjustable hybrid op amp.
4 industrial temperature range nw6005 enhanced type ii caller id decoder british telecom bt sin227 and sin242 define the signal interface between the central office (co) and the terminal equipment (te) for the caller display service (cds). cds provides clip (calling line identity presentation) that delivers to an idle state (on hook) te the identity of an incoming caller before the first ring. a polarity reversal on the a and b wires indicates the arrival of a cds call. after that comes an idle state tone a lert s ignal, and then caller id fsk information transmitted in itu-t v.23 format. when the subscriber is engaged in a call, the arrival of information about another incoming call is indicated by a loop state tone alert signal. the nw6005 can detect tone alert signal and demodulate the incoming itu-t v.23 fsk signals. etsi the etsi caller identity specifications ets 300 788-1 for on-hook and ets 300 788-2 for off-hook define the requirements for cpe, while ets 300 659-1 for on-hook and ets 300 659-2 for off-hook define the end office requirements. the services such as clip and clip with call waiting in etsi specifications are similar to those of bellcore. the etsi specifications are popularly used in europe. functional description caller id specs supported the nw6005 is a type ii caller id device with call waiting capability. it supports bellcore, bt and etsi specifications. the major differences between above specs are as follows (see fig. 11, fig. 12 and fig. 13 for reference): bellcore and tia bellcore gr-30-core and sr-tsv-002476 define the requirement for the signalling services of calling number delivery (cnd), calling name delivery (cnam), vmwi (visual message waiting indicator) and calling identity delivery on call waiting (cidcw). in cnd or cnam service, information of the calling party is embedded in the silent interval between the first and second ringing. the nw6005 can detect and demodulate the incoming bell-202 fsk data. in cidcw service, information about an incoming caller is sent to the subscriber who is engaged in another call. a cpe alerting signal (cas) indicates that a cidcw data is incoming. the nw6005 can detect the alerting signal and demodulate the incoming fsk information which contains cidcw data. the demodulated data is output onto the serial interface. in north america, telecommunications industry association (tia) also defines standards. tia specification tia/eia-716 defines type i cpe requirements. a type ii cpe specification document is drafted as tia/eia-777. fsk characteristics in tia specifications differ from those bellcore published in its specifications. pin name description cb0 fsk data interface mode select 0 1 fsk data interface mode 0: fsk bit stream is output directly. fsk data interface mode 1: fsk byte is stored in a 1 - byte buffer, which can be read serially by the microcontroller. cb1 cb2 functio n select 1 function select 0 cb1 1 1 0 0 cb2 1 0 1 0 fsk demodulation is enabled. tip/ring input (gs1) is selected. in fsk mode 1 operation (cb0 = ?1?), dr / std is dr . hybrid dt - as detection is enabled. hybrid receive input (gs2) is selected . dr / std is std . tip/ring dt - as detection is enabled. tip/ring input (gs1) is selected. dr / std is std . tip/ring dt - as detection is required for bellcore mei and bt on - hook clip. when cb0 is high (?1?): the nw6005 will be powered down. it draws minimal p ower supply current. when cb0 is low (?0?): for factory testing only. table 1. description of control bit pins cb0-2 pin informa tion (continued)
5 industrial temperature range nw6005 enhanced type ii caller id decoder block description the nw6005 requires a 3.579545 mhz system clock and consists of three major functional blocks: analog input circuit, dual tone alert signal detection, and fsk demodulation. analog input circuit the input signal is processed by the analog input circuit block, which is comprised of two op amps and a bias source (vref). vref is the output of a low impedance voltage source used to bias the input op amp, and is typically equal to vcc/2. the tip/ring op amp (in1+, in1-, gs1 pins) is for connecting to tip and ring, while the hybrid op amp (in2+, in2-, gs2 pins) is for connecting to hybrid receive pair. the gain adjustable op amps are also used to select the input gain by connecting a feedback resistor be tween gs and the in- pin. fig. 3 shows the differential input configuration . in single- ended configuration, the gain adjustable op amp is connected as shown in fig. 4. r2 r1 r3 r4 r5 c1 c2 nw6005 v ref in+ in- gs differential input amplifier c1=c2 r1=r2 (for unity gain r5=r2) r3=(r4r5)/(r4+r5) voltage gain av = r5/r2 input impedance zin =2 ? r1 2 + (1/ w c) 2 figure 3. differential input gain control circuit rin rf c nw6005 in+ in- gs v ref voltage gain av = rf / rin figure 4. single-ended input gain control circuit dt -as detection on either tip/ring or hybrid receive pair in off-hook services, the detection of dual tone alert signal (dt-as) will affect the quality of the call waiting service. even though the end office has muted the far end party before and after it sends dt-as, the near end user who is to receive the fsk information may be still talking. therefore, the cpe must be able to detect dt-as successfully in the presence of near end speech. furthermore, imitation of dt-as by speech will also affect the dt-as detector, thus false detection may be generated. to achieve better dt-as detection quality, a method is to put dt-as detection on the telephone hybrid receive pair instead of on tip/ring. as the near end speech has been attenuated while the dt-as level is the same as on tip/ring, the dt-as immunity is improved. a cpe capability called multiple extension interworking(mei), in process of being defined by bellcore, requests the cpe be capable of detecting dt-as when the line is off-hook, although the cpe itself may be on-hook. under some conditions, an on-hook cpe may send an acknowledgment to the end office. also, the on-hook cpe?s capability of detecting dt-as enables the call logs between on and off-hook cpes to be maintained synchronous. in this way, when all off-hook cpes are mei compatible and dt-as is received, one of the cpes will send the acknowledgment signal and all cpes will receive fsk. therefore, if the dt-as detector is connected only to the hybrid receive pair, the cpe can not detect dt-as when it is on-hook. when the cpe is on-hook, either the hybrid is non-functional or the signal level is severely attenuated. thus, an on-hook cpe must be able to detect dt-as from tip/ring. the nw6005 provides two input op amps via which the device can be connected both to tip/ring and to the hybrid receive pairs. both connection can be differential or single-ended. fsk demodulation is implemented only on tip/ring, while dt-as detection can be on either tip/ring or hybrid receive. tip/ring dt-as detection is required for mei and bt?s on-hook clip. it should be noted here that as the hybrid op amp is for dt-as detection only, its gain can always be adjusted specifically for the dt- as signal.
6 industrial temperature range nw6005 enhanced type ii caller id decoder dual tone alert signal detection the dual tone alert signal is used only in off-hook signalling in bellcore system and etsi system, but in bt system it is used in both on and off-hook signalling. the low and high tone frequencies of three different systems are as follows: when the device selects dt-as detection, the bi-purpose output pin dr / std is std . std goes low when dt-as has been detected and return high after dt-as has ended. the incoming alert signal goes through anti-alias filter and then is separated into high band and low band by two bandpass filters. the tone detection algorithm examines the filter outputs to validate the arrival of the dt-as. the est pin becomes active when both tones are detected. the est is only the preliminary indication, it must be qualified by the ?guard time? as required by bellcore, bt and etsi (a minimum duration for valid signals). std is the guard time qualified dt-as detection output, it indicates the correct detection. fig. 5 shows the operation of the guard time circuit and fig. 6 shows the waveform of the est, st/gt and std pins. the total recognition time is t rec = t dp + t gp , where t dp is the tone present detection time and t gp is the tone present guard time. the total absent time is t abs = t da + t ga , where t da is the tone absent detection time and t ga is the tone absent guard time. the guard time is the rc time constant for the capacitor charge to vcc or discharge to gnd. to get the unequal present and absent guard time, a diode can be connected as shown in fig. 7 to provide different rc time constant (varying resistance value) during charging and discharging. figure 7. guard time circuits with unequal present and absent times t gp > t ga t gp =r1cin(v cc /(vcc-v tgt )) t ga =r p cin((v cc -vd(r p /r2))/ (v t gt -vd(r p /r2))) r p =r1r2/(r1+r2) vd=diode forward voltage t gp < t ga t gp =r p cin((v cc -vd(r p /r2))/ (v cc -v tgt -vd(r p /r2))) t ga =r1cin(v cc /v tgt ) r p =r1r2/(r1+r2) vd=diode forward voltage bt bellcore & etsi low tone frequency 2130 hz 1.1% (on - hook) 2130 hz 0.6% (off - hook) 2130 hz 0.5% high tone frequency 2750 hz 1.1% (on - hook) 2750 hz 0.6% (off - hook) 2750 hz 0.5% figure 5. guard time circuit of dual tone alert signal detection alerting signal on on on t dp t da t ga t gp v tgt v tgt t rec t abs dt-as est st/gt std q1 switch q2 switch figure 6. guard time waveform r1 r2 c nw6005 vcc st/gt est r1 r2 c nw6005 vcc st/gt e st nw6005 dual tone detected vcc vcc c3 r5 q1 q2 p n comparator v tgt st/gt est std
7 industrial temperature range nw6005 enhanced type ii caller id decoder fsk demodula tion the key part among the functions offered by nw6005 is fsk demodulation. this function is implemented by several stages: first, the carrier detector provides an indication of the presence of signal at the bandpass filter output; second, the device?s dual mode serial interface allows convenient extraction of the 8-bit data words in the demodulated fsk bit stream. the fsk characteristics are different in bt, etsi and bellcore specifications. the signal frequencies in bt and etsi correspond to itu-t v.23; the bellcore frequencies correspond to bell 202. the nw6005 is compatible with both formats. it also meets the signal characteristics by setting the tip/ring input op amp at unity gain in 5v operation. for 3 v operation, the fsk receiver becomes easier to accept lower level signals than in 5 v operation. the tip/ring input op amp gain should be reduced to maintain the fsk reject level. serial fsk interf ace the three wire data, dclk and dr form the data interface of the fsk demodulation. the data pin is the serial data pin that outputs data to external devices. the dclk pin is the data clock which is used in mode ?1? and is generated by an external device. the dr pin is the data ready signal used in mode ?1?, also an output from the nw6005 to external devices. dr / std pin is a dual purpose output pin, when fsk function is selected it is dr . the fsk interface provides the mechanism to extract the 8-bit data words in the demodulated fsk bit stream without the need either for an external uart or for the cpe?s microcontroller to perform the function in software. two modes are selectable via control of the device?s cb0 pin: mode ?0? (cb0 is low), where the fsk bit stream is output directly; mode ?1? (cb0 is high), where the data byte and the stop bit are stored in a 9 bit buffer. mode ?0? (cb0 is low) in this mode, the device demodulates the incoming fsk signal, and output the data directly to the data pin. dclk and dr pins are unused. fig. 19 and fig. 20 shows the timing diagram of mode ?0? operation. mode ?1? (cb0 is high) in this mode, the received byte is stored on chip. the microcontroller supplies read pulses (dclk) to shift the register contents serially out of the nw6005, onto the data pin. the nw6005 asserts dr to denote the word boundary and indicate to the microprocessor that a new word has become available. internal to the device, the demodulated data bits are sampled and stored. midway through the stop bit, the 8 data bits and the stop bit are parallel loaded into an 9-bit shift register and dr goes low. the contents of register are shifted out to data pin on dclk?s rising edge with lsb (least significant bit) out first. if dclk begins while dr is low, dr will return to high upon the first dclk rising edge. this feature allows the associated interrupt to be cleared by the first read pulse. otherwise, dr stays low for half a nominal bit time (1/2400 sec) and then returns to high. after the last bit (most signifi cant bit) has been read, additional dclks are ignored. fig. 18 shows the timing diagram of mode ?1? operation. reading the stop bit is a method of checking framing errors. if it?s certain that there is no framing error would occur, the microcontroller only needs to send 8 dclk pulses to shift the data byte out. after the checksum byte has be received, all 9 bits should be read and framing error checked. fsk carrier detection the carri er detector detects the presence of a signal of sufficient amplitude at the output of the fsk bandpass filter. if the signal is qualified by a digital algorithm, it set the cd output to low indicating a successful carrier detection. nw6005 supplies a 10 ms hysteresis to allow for momentary signal drop out once cd has been activated. when there is no activity at the fsk bandpass filter output for 10 ms, cd is released. when cd is inactive (high), the raw output of the fsk demodulator is ignored by the fsk data output interface. in mode?0?, the data pin is forced high. in mode ?1?, the internal shift register is not updated. if dclk is clocked, data is undefined. since signals such as dt-as, dtmf tones and speech are within the fsk frequency band and thus may activate the carrier detector. the nw6005 should be put into dt-as or power down mode when fsk is not expected to avoid false carrier detection and false demodulation. itu - t v.23 bell 202 mark freq. (?1?) 1300 hz 1.5% 1200 hz 1% space freq. (?0?) 2100 hz 1.5% 2200 hz 1%
8 industrial temperature range nw6005 enhanced type ii caller id decoder other functions power-down mode the device provides the power-down feature to reduce the power consumption. power-down can be activated by setting control bits 0-2 to ?100?. note that momentary transition of cb0-2 into the power-down code won?t activate power-down but will reset the device. in this mode, both input op amps, reference voltage and the oscillator are non functional. when the device is in power-down, data, dr / std , cd are high; est and st/gt are low. an intelligent power-down feature is implemented to futher reduce the operating current. when fsk is selected, dt-as detector is powered down. when dt-as is selected, fsk demodulator is powered down. the tip/ring and hybrid input op amps are not affected in the intelligent power-down. cr yst al oscilla t or a 3.579545 mhz crystal oscillator or other external clock source is required for nw6005. the crystal can be directly connected between oscin and oscout pins without any external component. if an external clock source is used, oscin pin should be driven by the clock source and oscout pin is left floating or is used to drive other devices. fig. 8 shows some applications. to the next device (b) common crystal connection of several devices sharing one timing source (a) connection of one device with crystal oscillator nw6005 osc in osc out 3.579545mhz nw6005 osc in osc out nw6005 osc in osc out nw6005 osc in osc out 3.579545mhz figure 8. applicaiton of clock driven circuit applica tion no te control bits programming functionality of the nw6005 can be selected by coding cb0-cb2, as shown in table 2. functionality group cb0 cb1 cb2 fsk demodulation mode 0 0 1 1 fsk demodulation mode 1 1 1 1 hybrid dt - as detection 1/0 1 0 tip/ring dt - as detection 1/0 0 1 power down 1 0 0 factory test only 0 0 0 table 2. control bits programming hybrid connection to optimize the device?s talkdown and talkoff performance, hybrid connection is recommended. there are two op amps in nw6005 which bring convenience for hybrid connection. when connected to the hybrid op amp, the hybrid circuit will attenuate the speech signal at least 9 db from the microphone to the speaker, which leads a much better performance of near-end talkdown and talkoff. it is highly recommended to demodulate the fsk signal using the tip/ring op amp and to detect the cas signal using the hybrid op amp. this implementation brings not only optimized talkdown and talkoff performance, but also the convenience to adjust fsk and cas sensitivity separately. gain setting ideally, the gain of the two op amps would be set to 0 db. but in real applications, the gain setting should be determined by industry standards as well as by customer requirements. the circuit and calculation method of gain setting is illustrated in figs. 3 and 4. for hybrid connection, the single-ended solution (fig. 4) is often selected. typically, the cas sensitivity should be lower than the fsk sensitivity in order to prevent missing the fsk signal while the cas signal is detected. therefore, it is suggested to set the gain of the op amp for fsk demodulation 3 db higher than that of the op amp for cas detection. the difference between fsk mode 0 and mode1 in fsk mode 0, the fsk serial bit stream is output to the data pin directly. dclk and dr pins are unused. the microcontroller reads out the data by the serial data interface which is implemented by software programming. the flexibility of using software improves the immunity to interference.
9 industrial temperature range nw6005 enhanced type ii caller id decoder applica tion informa tion figure 9. typical application circuit for bellcore mei compatible type ii telephone, 5 v operation nw6005 vref in1+ in1- gs1 gnd oscin oscout cb0 dclk data in2+ in2- gs2 cb2 cb1 vcc cd st/gt est dr / std telephone hybrid tip ring tx+ tx- rx- rx+ speaker r1 r2 tip ring c1 c2 39k 39k 470k 56k 56k gnd 470k 470k 2n2 2n2 56k 56k 330k r3 r4 100n 100n, 20% vcc= 5v +/-10% fsk interface mode 1 is selected xtal to microcontroller from microcontroller 470k 470k microphone note: 1. resistors are 1%, 0.1watt; unless stated, capacitors are 5%, 6.3 v. 2. all diodes in the circuit are 1n4148 or equivalent. 3. xtal is 3.579545 mhz, 0.1% crystal or ceramic resonator. 4. tip/ring op amp gain = 0 db; hybrid receive op amp gain = -3 db. 5. for 1000 vrms, 60 hz isolation from tip to earth and ring to earth: r1, r2 = 430 k, 0.5 w, 5%, 500 v min. c1, c2 = 2n2, 250 v min. 6. for bt application, r3=r4= 422k; for bellcore application, r3=825k, r4=226k. a b in fsk mode 1, the received byte is stored in an on-chip register. the microcontroller supplies read pulses (dclk) to shift the register contents serially out of the nw6005, onto the data pin. the dr pin is also used to indicate the word boundary. valid dt -as ev alua tion dt-as output will generate false detection if being interfered by speech. in this way, valid dt-as pulse evaluation becomes necessary. the evaluation defines a minimum and maximum pulse duration, and maximum drop out time within that pulse duration. see figure 21 for reference.
10 industrial temperature range nw6005 enhanced type ii caller id decoder figure 10. typical application circuit for bellcore mei compatible type ii telephone, 3 v operation nw6005 vref in1+ in1- gs1 gnd oscin oscout cb0 dclk data in2+ in2- gs2 cb2 cb1 vcc cd st/gt est dr / std telephone hybrid tip ring tx+ tx- rx- rx+ speaker r1 r2 tip ring c1 c2 39k 39k 282k 56k 56k gnd 470k 470k 2n2 2n2 56k 56k 200k r3 r4 100n 100n, 20% vcc= 3v +/-10% fsk interface mode 1 is selected xtal to microcontroller from microcontroller 282k 282k microphone note: 1. resistors are 1%, 0.1watt; unless stated, capacitors are 5%, 6.3 v. 2. all diodes in the circuit are 1n4148 or equivalent. 3. xtal is 3.579545 mhz, 0.1% crystal or ceramic resonator. 4. tip/ring op amp gain = 0 db; hybrid receive op amp gain = -3 db. 5. for 1000 vrms, 60 hz isolation from tip to earth and ring to earth: r1, r2 = 430 k, 0.5 w, 5%, 500 v min. c1, c2 = 2n2, 250 v min. 6. for bt application, r3=r4= 422k; for bellcore application, r3=825k, r4=226k. a b
11 industrial temperature range nw6005 enhanced type ii caller id decoder ..101010.. data ... ... pwdn fsken cd dr dclk data ch. seizure mark message a b c d e f alerting signal a/b wires 1st ringing 2nd ringing figure 11. bellcore on-hook data transmission timing diagram note 2 note 1 note 2 note 3 note 4 note 5 note6 note6 note7 note7 notes: 1) a= 2 sec typ., b= 250 - 500 ms, c= 250 ms, d= 150ms, e depends on data length, max c+d+e = 2.9 - 3.7 sec, f 3 200 ms. 2) in a battery operated cpe, nw6005 may be enabled only after the end of ringing to conserve power. 3) the microcontroller in the cpe powers down the nw6005 after cd goes inactive. 4) the microcontroller times out if cd is not activated on the 2nd ring and puts the device into power-down mode. 5) fsk may be always enabled while the cpe is on-hook. to prevent the fsk demodulator from reacting to other inband signals such as speech, dt-as or dtmt tones. the designer may choose to disable fskduring the period that fsk signal is not expected. 6) pwdn and fsken are internal signals decoded from control bits cb2-0. 7) when cb0 is low, both dr and dclk pins are unused.
12 industrial temperature range nw6005 enhanced type ii caller id decoder cas mark message cpe off-hook cpe mutes handset and disable keypad cpe unmutes handset and enable keypad a b c d e f g a/b wires pwdn fsken cpe sends ack std ... data cd dr dclk data hybrid dt-asen notes: 1) a= 75 - 85 ms, b= 0 -100 ms, c= 55 - 65 ms, d= 0 - 500 ms, e= 58 - 75ms, f depends on data length, g 50 ms. 2) if ac power is not available, the designer may use the line power when the cpe goes off-hook and use battery power while on-hook. the cpe should also be cid (on-hook) capable . 3) if the end office fails to send the fsk signal, the cpe should disable fsken and unmute the handset and enable the keypad after this interval. 4) when fsk signal is not expected, the fsk en should be set low to disable the fsk demodulator. 5) fsk en should be high as soon as the cpe has finished sending the acknowledgement signal ack. 6) fsk en should be low when cd become inactive. 7) pwdn, fsken and hybrid dt-asen are internal signals decoded from control bits cb2-0. 8) when cb0 is low, both dr and dclk pins are unused. note 1 note 2 note 3 note 4 note 5 note 6 figure 12. bellcore off-hook data transmission timing diagram note7 note7 note7 note 8 note 8
13 industrial temperature range nw6005 enhanced type ii caller id decoder alerting signal ch. seizure mark message ring ..101010.. data ... ... a b c d e f g line reversal a/b wires pwdn std te dc load te ac load fsken cd dr dclk data 15 1 ms 20 5 ms <120 m a 50 - 150 ms < 0.5 ma (optional) current wetting pulse zss tip/ring dt-asen note 1 note 2 note 3 note 4 notes: 1) a 3 100ms, b=88 - 110 ms, c 3 45 ms (up to 5 sec), d= 80 -262 ms, e= 45 - 75 ms, f 2.5 sec (typ. 500 ms), g 3 200 ms. 2) by choosing t ga =15 ms, t abs will be 15-25 ms (refer to fig. 8). current wetting pulse and ac/dc load should be applied right after the std rising edge. 3) ac and dc loads should be removed between 50-150 ms after the end of the fsk signal. the nw6005 may go to power down mode to save power. 4) fsk en should be set low to disable the fsk demodulator, when the fsk signal is not expected. 5) tip/ring dt-asen, pwdn and fsken are internal signals decoded from control bits cb2-0. 6) when cb0 is low, both dr and dclk pins are unused. figure 13. bt idle state (on-hook) data transmission timing diagram note 5 note 5 note 5 note 6 note 6
14 industrial temperature range nw6005 enhanced type ii caller id decoder maximum ra ting - exceeding the following listed values may cause permanent damage. power supply voltage: -0.3 v to 6 v voltage on any pin other than supplies: gnd - 0.3 v to vcc + 0.3 v current at any pin other than supplies: 10 ma storage temperature: -65 c to +150 c recommended opera ting conditions operating temperature: -40 c to +85 c power supply voltage: 3 v 10% or 5 v 10% clock frequency: 3.579545 mhz 0.1% input voltage: 0 v to vcc cr y st al s pecifica tions frequency: 3.579545 mhz resonancy tolerance: 0.1%( -40c to +85c) resonance mode: parallel load capacitance: 18 pf maximum series resistance: 150 w maximum drive level: 2 mw dc electrical characteristics test 1: all inputs are vcc/gnd except for oscillator pins. no analog input. output unloaded. nw6005 in power down mode. test 2: all inputs are vcc/gnd except for oscillator pins. no analog input. ouput unloaded. fsk is enabled. parameter pin description min typ max units test conditions i ccs power supply standby current 0.5 15 m a test 1 i cc vcc operating supply current vcc = 5 v 10% vcc = 3 v 10% 2.5 1.8 3.8 2.7 ma ma test 2 v t+ schmitt trigger input high thresho ld 0.5vcc 0.7vcc v v t - dclk schmitt trigger input low threshold 0.3vcc 0.5vcc v v hys schmitt hysteresis 0.2 v v ih cb0 cb1 cmos input high voltage 0.7vcc vcc v v il cb2 cmos input low voltage gnd 0.3vcc v i oh dclk, data, est dr / std , cd , st/gt output high sourcing current - 0.8 ma v oh =0.9vcc
15 industrial temperature range nw6005 enhanced type ii caller id decoder parameter pin description min typ max units test conditions i ol dclk, data dr / std , cd est, st/gt output low sinking current 2 ma v ol = 0.1vcc iin1 in1+, in1 - in2+, in2 - input current 1 m a iin2 dclk cb0, cb1, cb2 input current 10 m a v in = vcc t o gnd i oz 1 st/gt output high impedance 5 m a v out = vcc to gnd vref output voltage 0.5vcc - 0.1 0.5vcc+0.1 v no load rref vref output resistance 2 k w v tgt st/gt comparator threshold voltage 0.5vcc - 0.05 0.5vcc+0.05 v dc electrical characteristics (continued) parameter description min typ max units notes f l low tone frequency 2130 hz nominal frequency f h high tone frequency 2750 hz nominal frequency fda frequency deviation accept 1.1% within this range, tones are accepted. fdr frequency deviation rej ect 3.5% outside this range, tones are rejected. sigac accept signal level per tone - 40 - 2 dbv sigrj reject signal level per tone (vcc = 5 v 10%, 3 v 10%) - 47 dbv input op amp configured to 0 db gain for 5 v operation, gain for 3 v operation is tbd. signal level is per tone. ta positive and negative twist accept # 7 db snr signal to noise ratio 20 db both tones have the same amplitude and at nominal frequencies. band limited random noise 300 - 3400 hz. measurement valid only when tone is present. ac electrical characteristics dual tone alert signal detection # twist = 20 |log ( f h amplitude / f l amplitude )|.
16 industrial temperature range nw6005 enhanced type ii caller id decoder ac electrical characteristics (continued) gain adjustable op amp parameter description min typ max units test conditions i in input leakage current 1 m a gnd v in vcc r in input resistance 10 m w v os input offset voltage 10 mv psrr power supply rejection ratio 40 db 1khz ripple on vcc cmrr common mode reje ction 30 db v cmmin v in v cmmax a vol dc open loop voltage gain 50 db f c unity gain bandwidth 0.3 mhz v o output voltage swing 0.5 vcc - 0.5 v load 3 100 k w c l maximum capacitive load (gs) 50 pf r l maximum resistive load (gs) 100 k w v cm common mode range voltage 1.0 vcc - 1.0 fsk detection parameter description min typ max units notes id input detection level - 40 - 6.45 dbv rs reject signal level - 48 dbv production tested at vcc =3v 10%, or 5v 10%. both mark and space have the same amplitude. tr transmission rate 1188 1200 1212 baud fmark input frequency detection bell 202 ?1? (mark) 1188 1200 1212 hz fspace input frequency detection bell 202 ?0? (space) 2178 2200 2222 hz fmark input frequency detection itu - t v.23 ?1? (mark) 1280.5 1300 1319.5 hz fspace input frequency d etection itu - t v.23 0 (space) 2068.5 2100 2131.5 hz ta positive and negative twist accept * - 10 10 db snr signal to noise ratio 20 db both mark and space have the same amplitude and at nominal frequencies. band limited random noise: 200 - 3400 hz. pre sent only when fsk signal is present. # * twist = 20 |log ( f h amplitude / f l amplitude )|. # bt band is 200-3400 hz, while bellcore band is 0-4 khz. notes: dbv = decibels above or below a reference voltage of 1 vrms.
17 industrial temperature range nw6005 enhanced type ii caller id decoder ac timing characteristics power up/down and fsk detection parameter description min typ max units test conditions t1 power up time 50 ms t2 power down time 1 ms t3 input fsk to cd low delay 25 ms t4 input fsk to cd high delay 10 ms t5 hysteresis 10 ms dual tone alert signal parameter description min typ max units test conditions t6 alert signal present detect time 4 14 ms t7 alert signal absent detect time 0.1 8 ms power down is enabled by control bits oscout t1 t2 figure 14. power up/down timing figure 15. fsk detection time tip/ring cd fsk signal t3 t4 tip/ring or hybrid receive pair est alert signal t6 t7 figure 16. dual tone alert signal detection time
18 industrial temperature range nw6005 enhanced type ii caller id decoder parameter description min typ max units test conditions t11 dclk cycle time 1 m s t12 dclk high time 0.3 m s t13 dclk low time 0.3 m s t14 dclk rise time 100 ns t15 dclk fall time 100 ns t16 dclk low setup to dr 500 ns t17 dclk low ho ld time after dr 500 ns ac timing characteristics (continued) serial interface (mode ?1?) dclk t13 t14 t12 t15 t11 figure 17. dclk timing in mode ?1? figure 18. serial data interface timing in mode ?1? notes: 1. dclk clears dr . 2. dr not cleared by dclk, low for a maximum time of 1/2 bit width. b7 b0 b1 b2 b3 b4 b5 b6 b7 b7 stop b0 b1 stop start stop b0 nth byte (n-1)th byte nth byte (n+1)th byte t16 t17 internal demodulated bit stream dr dclk data note 1 note 2 start b2 b3 b4 b5 b6 b7 stop
19 industrial temperature range nw6005 enhanced type ii caller id decoder figure 20. serial data interface timing in mode ?0? parameter description min typ max units test conditions d r data rate 1188 1200 1212 baud 1 t21 input fsk to data delay 1 5 ms t22 data rise time 200 ns 2 t23 data fall time 200 ns 2 serial interface (mode ?0?) test conditions: 1. fsk input data at 1200 12 buad. 2. load of 50 pf. data t23 t22 figure 19. data output timing in mode ?0? b7 1 0 b0 b1 b2 b3 b4 b5 b6 b7 1 0 b0 b1 b2 b3 b4 b5 b6 b7 1 0 b0 b1 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b7 tip/ring data stop stop stop stop start start start start start start t21 nth byte (n+1)th byte nth byte (n+1)th byte maximum dropout span pulse duration min. min max. figure 21. valid dt-as pulses
20 corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 408-330-1552 santa clara, ca 95054 fax: 408-492-8674 email: telecomhelp@idt.com www.idt.com figure 21. nw6005-xs 20 pin soic package diagram phy sical dimensions in millimeters dimension in mm dimension in inch symbol min max min max a 2.35 2.65 0.093 0.104 a1 0.10 0.30 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 e 7.40 7.60 0.291 0.299 e 1.27 bsc 0.050 bsc h 10.00 10.65 0.394 0.419 h 0.25 0.75 0.010 0.0 29 l 0.40 1.27 0.016 0.050 q 0 8 0 8 d 12.60 13.00 - -

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